時(shí)間：2013年9月3日（周二）下午15:00-16:00

　　地點(diǎn)：446

　　摘要

　　Carbon Nanotube Field Effect Transistors (CNFETs) are excellent candidates for building highly energy-efficient future electronic systems. Unfortunately, carbon nanotubes (CNTs) are highly subject to inherent imperfections that pose major obstacles to robust CNFET digital VLSI: It is nearly impossible to guarantee perfect alignment and positioning of all CNTs; CNTs can be metallic or semiconducting depending on chirality.

　　A combination of design and processing techniques, presented in this talk, overcomes these challenges by creating CNFET digital VLSI circuits that are immune to these substantial inherent imperfections. This imperfection-immune design paradigm enables the first experimental demonstrations of: Digital sub-systems built using CNFETs and Monolithic three-dimensional CNFET ICs.

　　主講人簡(jiǎn)介

　　Subhasish Mitra is an Associate Professor and directs the Robust Systems Group in Department of Electrical Engineering and Department of Computer Science at Stanford University, where he is the Chambers Faculty Scholar of Engineering. Prof. Mitra's research interests include robust system design, VLSI design, CAD, validation and test, and emerging nanotechnologies. Prof. Mitra's honors include the Presidential Early Career Award for Scientists and Engineers from the White House, the highest U.S. honor for early-career outstanding scientists and engineers. Recently, he served on the Defense Advanced Research Projects Agency's (DARPA) Information Science and Technology Board as an invited member. He is a Fellow of the IEEE.